A semiconductor memory device comprises thin memory chips such as NAND flash memories stacked in layers and disposed on a circuit board to achieve compact size and high capacity. Through-silicon vias disposed in the memory chips provide electrical connections between the stacked memory chips. Micro-bumps electrically connect the through-silicon vias to each other. A semiconductor chip such as an interface (IF) chip is disposed on the stacked memory chips. This semiconductor chip comprises an IF circuit that performs data communication between the memory chips and external devices. Since the electrode array of the IF chip is different from that of the memory chips, a re-wiring layer for relocating electrodes may be formed on the memory chip nearest the IF chip. The electrodes of the IF chip are electrically connected to the electrodes of the memory chip through the micro-bumps formed on the re-wiring layer.
Where micro-bumps provide the electrical connections between the chips, bump electrodes are positioned on adjacent semiconductor chips and the adjacent semiconductor chips are compression-bonded while applying heat to make the connection between the bump electrodes. An under-fill resin is disposed between the semiconductor chips to improve connection reliability and the like. Since adjacent semiconductor chips are connected only by the micro-bumps before the under-fill resin is introduced, warpage of the semiconductor chips after bump connection is likely to cause a connection failure (open failure). To address such a problem, an adhesive is provided locally between the semiconductor chips to improve the adhesive strength between the semiconductor chips. However, as the number of stacked semiconductor chips increases, the amount of warpage of the semiconductor chip increases.